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Intel / Altera CPLDs der Serie MAX7000A
- High-Performance 3,3V EEPROM-basiertes CPLD
- MAX-Architektur (Multiple Array MatriX)
- 3,3V-ISP (in-system programmability) durch das eingebaute JTAG-Interface
- eingebauter BST-Schaltkreis (boundary-scan test)
- u...
Intel / Altera CPLDs der Serie MAX7000A
- High-Performance 3,3V EEPROM-basiertes CPLD
- MAX-Architektur (Multiple Array MatriX)
- 3,3V-ISP (in-system programmability) durch das eingebaute JTAG-Interface
- eingebauter BST-Schaltkreis (boundary-scan test)
- unterstützt JEDEC Jam Standard Test and Programming Language (STAPL)